Saturday, March 17, 2018

c - Ordering of atomics with `memory_order_seq_cst`

My reading of the C11 spec with regards to atomic operation ordering suggests that memory_order_seq_cst applies to operations on a specific atomic object.




Mostly, the descriptions are of the form "If a A and B are applied to M, then the order is maintained on M"



My question is specifically what happens if we have two operations that apply to different atomic objects. Something like the following:



atomic_store(&a, 20);
atomic_store(&b, 30);


where a and b are atomic (volatile) types (and atomic_store implies memory_order_seq_cst).




This problem is relevant to a memory mapped situation where the memory map represents the registers of some peripheral.



It's perfectly normal to have requirements about the ordering of the write. Let's say a = 20 is setting up the target for our missile peripheral and setting b = 30 is the launch command. Clearly, we don't want to launch until the missile is targeted properly.



If it makes a difference to anything, this is on ARM Linux with GCC.

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